A Compact, Low-Power Analog Front-End With Event-Driven Input Biasing for High-Density Neural Recording in 22-nm FDSOI

An ultra-small-area, low-power analog front-end (AFE) for high-density neural recording is presented in this brief. It features an 11-bit incremental delta-sigma analog-to-digital converter ( $\Delta \Sigma $ ADC) enhanced with offset-rejecting event-driven input biasing network. This network avoids saturation of the ADC caused by leakage input-coupling capacitor implemented advanced technology node. Combining AC-coupling direct data conversion, proposed AFE can tolerate a rail-to-rail electrode offset and achieves good trade-off between power, noise, bandwidth, impedance, area. Fabricated 22-nm fully-depleted silicon on insulator (FDSOI) process, design occupies active area <0.001mm2, smallest obtained to date AFE, consumes notation="LaTeX">$\mathbf { < }3~\mu \text{W}$ from 0.8-V supply. input-referred noise notation="LaTeX">$11.3~\mu \text{V}_{\mathrm{ rms}}$ action potential band (300 Hz – 10 kHz) notation="LaTeX">$\mu local field (1 300 Hz).